List of All Posts

  1. ChatGPT’s take on SEGGER J-Links: An insightful “conversation”
  2. J-Link PRO PoE powers the SEGGER test farm
  3. Debugging with external memory: J-Link adds Dual Memory Maps
  4. Automated testing made easy with emSim
  5. CPU Design at SEGGER
  6. A whole new way to interact with headless devices
  7. RISC-V: Dividing efficiently across different hardware
  8. Size matters – Comparing tool chains and CPUs
  9. C++ pitfalls – Memory allocation from interrupts
  10. Securing embedded systems with digital signatures: The basics
  11. C++ real-time allocation — a chess engine
  12. Hacking emSecure?
  13. Algorithms for division – part 4 – Using Newton’s method
  14. Algorithms for division – part 3 – Using multiplication
  15. Saving power in embedded systems – Reducing idle CPU speed
  16. Algorithms for division – part 2 – Classics
  17. Algorithms for division – part 1
  18. emWeb: User interface in the web browser
  19. Risks Are Often Underestimated — It Is Not Only the Chip Crisis that Threatens Embedded Manufacturers
  20. emVDSP vs CMSIS-DSP
  21. SEGGER’s Embedded Studio Achieves Top Rating in German Elektronik Magazine
  22. Working at SEGGER Microcontroller: The question of “why?”
  23. SEGGER Embedded Studio on Apple M1 and Intel i7
  24. Correlating and visualizing data sampling, current consumption, and program execution via Ozone’s Timeline Window
  25. Code Size: Squeezing more with linker outlining
  26. Code size: Closing the gap between RISC-V and Arm for embedded applications
  27. Every byte counts – Floating-point in less than 1 KB
  28. Every byte counts – Smallest “Hello world”
  29. Integrity checks with the new SEGGER Linker
  30. Every Byte counts – The 100-Byte Blinky Challenge
  31. Debugging the dual-core NXP i.MX RT600 with the one and only SEGGER J-Link
  32. Extending AppWizard-generated GUIs with emWin Widgets
  33. How to do Gauges in AppWizard – Part II
  34. Profiling and Code coverage on RISC-V using simulation
  35. How to do Gauges in AppWizard – Part I
  36. SEGGER in times of the coronavirus / COVID-19
  37. The SEGGER Compiler
  38. Floating-point face off, part 3: How we do it
  39. Floating-point face-off, part 2: Comparing performance
  40. Finding the right (Q)SPI Flash for your project
  41. The Good, The Best, and The Only
  42. Floating-point face-off
  43. IoT Station#1 Launched (using emMQTT)
  44. Using AppWizard to create interesting buttons
  45. Turning an FPGA into a powerful microcontroller. No external memory required.
  46. Creating a cool knob using the SEGGER AppWizard
  47. Express Logic acquired by Microsoft
  48. Building our own tools for documentation
  49. Decoding the Akai Fire MIDI implementation – part 3
  50. Decoding the Akai Fire MIDI implementation – part 2
  51. Decoding the Akai Fire MIDI implementation – part 1
  52. New office, more plans!
  53. Designing quality software
  54. Quality at SEGGER
  55. J-Run: Automating performance tests on real hardware
  56. Current state of the trace market
  57. SMASH: an efficient compression algorithm for microcontrollers
  58. RISC-V adoption and 7th Workshop thoughts
  59. The SEGGER linker and SOMNIUM assets
  60. emNet with built-in UDP flood protection
  61. Killer features of the SEGGER linker, or what’s wrong with the GNU linker?
  62. The SEGGER Linker – Replacing the GNU linker
  63. Using a watchdog in a multi-task (RTOS) environment
  64. Performance tuning our software
  65. Getting printf Output from Target to Debugger
  66. Update on: Comparing Performance on Windows, Linux and OS X
  67. Getting started with J-Trace PRO
  68. Why you should benchmark your embedded system
  69. Comparing Performance on Windows, Linux and OS X
  70. Embedded Studio for Windows: 64-bits vs. 32-bits
  71. Welcome