Things at SEGGER have been slower for the past three months or so. Or at least it may seem like that from the outside. There are two main reasons for this. First, we had a great summer and vacation season in Germany (as in most of Europe). Secondly, we have been busy planning, supervising construction […]
Designing quality software
This is the second in the series of postings that describe the quality processes at SEGGER. This article picks a single design principle from the many we use when developing our software products, one that is deeply rooted.
Quality at SEGGER
This is the first post in a series that deal with delivering SEGGER products: how they’re designed, developed, tested, documented, and released.
J-Run: Automating performance tests on real hardware
One of the things that irritates me a lot is manual work that should be automated by machines. Automation always trumps the error-prone human and, in my case, offered the opportunity to get to use some of SEGGER”s software I’d never used before to develop a useful tool.
Current state of the trace market
When talking about tracing, you will mostly hear about the approach on the software side on how the trace data gets analyzed and all the associated benefits. But what about the hardware and any possible limitations? The different trace types Generally speaking, trace is an advanced debugging technique that offers the user a link between […]
SMASH: an efficient compression algorithm for microcontrollers
One of the things that is driven from the top in SEGGER is that we can always do better. Not satisfied with standard schemes, we wanted to optimize emCompress, SEGGER’s compression library, for: Very fast decompression High compression ratio (uncompressed size divided by compressed size) Small decompressor Limited state in RAM when decompressing
RISC-V adoption and 7th Workshop thoughts
You have probably seen that SEGGER attended the recent (7th) RISC-V Workshop. There we demonstrated J-Link support for RISC-V cores and Embedded Studio for RISC-V, our professional-grade IDE that (unsurprisingly) targets RISC-V processors. This post offers a personal view on RISC-V and a reflection on the workshop.
The SEGGER linker and SOMNIUM assets
Startups come and go, some make it, some don’t. The embedded tools market is especially tough even for those that know it well, and being able to innovate and be successful needs true insight. To cut to the chase, SEGGER have acquired all intellectual property assets of SOMNIUM Technologies.
emNet with built-in UDP flood protection
emNet comes with many features already built-in. One of these features is a UDP flood protection that can help you to save execution time on incoming data that would be discarded anyhow. Whether you are really subject to an attack or you are simply part of a really crowded network, this optimization can free up […]
Killer features of the SEGGER linker, or what’s wrong with the GNU linker?
In the previous post, Rolf described some of the progress that we have made on the brand-new SEGGER linker. In this post I examine the gnarly problems with the GNU linker and how they are easily solved by the SEGGER linker. A follow-up post will examine more of the linker’s capabilities.