Profiling and Code coverage on RISC-V using simulation

We recently licensed our Floating point library for RISC-V to a large international corporation. They asked not only for our functional verification suite, but also for a verification of the verification suite. A code coverage report showing that the entire code had been executed. While we know that all lines and every instruction have been […]

Getting printf Output from Target to Debugger

  Erich Styger recently posted a great tutorial on how to add console functionality using Single Wire Output (SWO) on ARM Cortex-M targets. This inspired me to write a more general post on debug output (“printf”) implementations on embedded target, including SWO and RTT. Debug Output from a Target There are different methods to get debug output from the […]