RISC-V: Dividing efficiently across different hardware

In previous blog posts I have described the division algorithms SEGGER implemented in emRun. However, which algorithm is best (in terms of code size, execution speed, or power efficiency) is very dependent on the target instruction set architectue (ISA) and the way the ISA is implemented in silicon. This article explains how we help to select the best division algorithm for use. (more…)

Size matters – Comparing tool chains and CPUs

Many people think that in today’s world, the size of a program does not matter. In many cases, that is not true, especially in the world of embedded computing systems. I explain why and introduce a benchmark that makes it possible to easily compare the code-size efficiency of different tool chains (Compiler, assembler, linker, run […]

C++ pitfalls – Memory allocation from interrupts

Modern C++ programming very much abstracts what is happening “under the hood” – i.e. what code the CPU is actually executing. This is nice for the programmer … if it works well. Unfortunately, C++ also introduces a stability problem in embedded systems. Many programmers are unaware of this problem. This post gives some background, explains […]

Securing embedded systems with digital signatures: The basics

Securing an embedded system is incredibly important and having a digital signature plays a crucial role in that. A digital signature confirms that a specific piece of information came from a specific organization (i.e. the one with the private key as described below) and has not been modified. Follow-up articles will firstly cover related issues […]

Saving power in embedded systems – Reducing idle CPU speed

Dynamic power, meaning power consumption that is proportional to a clock speed, is a significant part of the power usage of a computer system. Reducing CPU load is one way to reduce this. More interestingly, reducing CPU clock speed in idle mode is another way. And there is hardly any downside!